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ne5532 , ne5532a , sa5532 , sa5532a slos075j ? november 1979 ? revised january 2015 ne5532x, sa5532x dual low-noise operational amplifiers 1 features 3 description the ne5532, ne5532a, sa5532, and sa5532a 1 ? equivalent input noise voltage: devices are high-performance operational amplifiers 5 nv/ hz typ at 1 khz combining excellent dc and ac characteristics. they ? unity-gain bandwidth: 10 mhz typ feature very low noise, high output-drive capability, ? common-mode rejection ratio: 100 db typ high unity-gain and maximum-output-swing bandwidths, low distortion, high slew rate, input- ? high dc voltage gain: 100 v/mv typ protection diodes, and output short-circuit protection. ? peak-to-peak output voltage swing 26 v typ these operational amplifiers are compensated with v cc = 15 v and r l = 600 ? internally for unity-gain operation. these devices ? high slew rate: 9 v/ s typ have specified maximum limits for equivalent input noise voltage. 2 applications device information (1) ? av receivers part number package (pin) body size (nom) ? embedded pcs ne5532x, sa5532x soic (8) 4.90 mm 3.91 mm ? netbooks ne5532x, sa5532x pdip (8) 9.81 mm 6.35 mm ? video broadcasting and infrastructure: scalable ne5532x so (8) 6.20 mm 5.30 mm platforms (1) for all available packages, see the orderable addendum at ? dvd recorders and players the end of the data sheet. ? multichannel video transcoders ? pro audio mixers 4 simplified schematic 1 an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. + rin rg rf vout vin productfolder sample &buy technical documents tools & software support &community
ne5532 , ne5532a , sa5532 , sa5532a slos075j ? november 1979 ? revised january 2015 www.ti.com table of contents 8.2 functional block diagram ......................................... 7 1 features .................................................................. 1 8.3 feature description ................................................... 7 2 applications ........................................................... 1 8.4 device functional modes .......................................... 7 3 description ............................................................. 1 9 application and implementation .......................... 8 4 simplified schematic ............................................. 1 9.1 typical application ................................................... 8 5 revision history ..................................................... 2 10 power supply recommendations ..................... 11 6 pin configuration and functions ......................... 3 11 layout ................................................................... 11 7 specifications ......................................................... 4 11.1 layout guidelines ................................................. 11 7.1 absolute maximum ratings ...................................... 4 11.2 layout example .................................................... 11 7.2 esd ratings .............................................................. 4 12 device and documentation support ................. 13 7.3 recommended operating conditions ....................... 4 12.1 related links ........................................................ 13 7.4 thermal information .................................................. 4 12.2 trademarks ........................................................... 13 7.5 electrical characteristics ........................................... 5 12.3 electrostatic discharge caution ............................ 13 7.6 operating characteristics .......................................... 5 12.4 glossary ................................................................ 13 7.7 typical characteristics .............................................. 6 13 mechanical, packaging, and orderable 8 detailed description .............................................. 7 information ........................................................... 13 8.1 overview ................................................................... 7 5 revision history changes from revision i (april 2009) to revision j page ? added applications , device information table, pin functions table, esd ratings table, thermal information table, typical characteristics , feature description section, device functional modes , application and implementation section, power supply recommendations section, layout section, device and documentation support section, and mechanical, packaging, and orderable information section. ................................................................................................. 1 ? deleted ordering information table. ....................................................................................................................................... 1 2 submit documentation feedback copyright ? 1979 ? 2015, texas instruments incorporated product folder links: ne5532 ne5532a sa5532 sa5532a
ne5532 , ne5532a , sa5532 , sa5532a www.ti.com slos075j ? november 1979 ? revised january 2015 6 pin configuration and functions pin functions pin type description name no. 1in+ 3 i noninverting input 1in- 2 i inverting input out1 1 o output 2in+ 5 i noninverting input 2in- 6 i inverting input 2out 7 o output vcc+ 8 ? positive supply vcc- 4 ? negative supply copyright ? 1979 ? 2015, texas instruments incorporated submit documentation feedback 3 product folder links: ne5532 ne5532a sa5532 sa5532a 1 2 3 4 5 6 7 8 2in+ 2in? 2out v cc+ v cc? 1in+ 1in? 1out ne5532, ne5532a . . . d, p, or ps package sa5532, sa5532a . . . d or p package (top view)
ne5532 , ne5532a , sa5532 , sa5532a slos075j ? november 1979 ? revised january 2015 www.ti.com 7 specifications 7.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit v cc+ 0 22 v v cc supply voltage (2) v cc ? ? 22 0 v input voltage, either input (2) (3) v cc ? v cc+ v input current (4) ? 10 10 ma duration of output short circuit (5) unlimited t j operating virtual-junction temperature 150 c t stg storage temperature range ? 65 150 c (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) all voltage values, except differential voltages, are with respect to the midpoint between v cc+ and v cc ? . (3) the magnitude of the input voltage must never exceed the magnitude of the supply voltage. (4) excessive input current will flow if a differential input voltage in excess of approximately 0.6 v is applied between the inputs, unless some limiting resistance is used. (5) the output may be shorted to ground or either power supply. temperature and/or supply voltages must be limited to ensure the maximum dissipation rating is not exceeded. 7.2 esd ratings value unit human body model (hbm), per ansi/esda/jedec js-001, all 2000 pins (1) v (esd) electrostatic discharge v charged device model (cdm), per jedec specification jesd22- 1000 c101, all pins (2) (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 7.3 recommended operating conditions min max unit v cc+ supply voltage 5 15 v v cc ? supply voltage ? 5 ? 15 v ne5532, ne5532a 0 70 t a operating free-air temperature c sa5532, sa5532a ? 40 85 7.4 thermal information ne5532, ne5532a, sa5532, and sa5532a thermal metric (1) d p ps unit 8 pins r ja junction-to-ambient thermal resistance (2) (3) 97 85 95 c/w (1) for more information about traditional and new thermal metrics, see the ic package thermal metrics application report, spra953 . (2) the package thermal impedance is calculated in accordance with jesd 51-7. (3) maximum power dissipation is a function of t j (max), ja , and t a . the maximum allowable power dissipation at any allowable ambient temperature is p d = (t j (max) ? t a ) / ja. operating at the absolute maximum t j of 150 c can affect reliability. 4 submit documentation feedback copyright ? 1979 ? 2015, texas instruments incorporated product folder links: ne5532 ne5532a sa5532 sa5532a
ne5532 , ne5532a , sa5532 , sa5532a www.ti.com slos075j ? november 1979 ? revised january 2015 7.5 electrical characteristics v cc = 15 v, t a = 25 c (unless otherwise noted) parameter test conditions (1) min typ max unit t a = 25 c 0.5 4 v io input offset voltage v o = 0 mv t a = full range (2) 5 t a = 25 c 10 150 i io input offset current na t a = full range (2) 200 t a = 25 c 200 800 i ib input bias current na t a = full range (2) 1000 v icr common-mode input-voltage range 12 13 v v opp maximum peak-to-peak output-voltage swing r l 600 ? , v cc = 15 v 24 26 v t a = 25 c 15 50 r l 600 ? , v o = 10 v t a = full range (2) 10 a vd large-signal differential-voltage amplification v/mv t a = 25 c 25 100 r l 2 k ? , v o 10 v t a = full range (2) 15 a vd small-signal differential-voltage amplification f = 10 khz 2.2 v/mv b om maximum output-swing bandwidth r l = 600 ? , v o = 10 v 140 khz b 1 unity-gain bandwidth r l = 600 ? , c l = 100 pf 10 mhz r i input resistance 30 300 k ? z o output impedance a vd = 30 db, r l = 600 ? , f = 10 khz 0.3 ? cmrr common-mode rejection ratio v ic = v icr min 70 100 db k svr supply-voltage rejection ratio ( v cc / v io ) v cc = 9 v to 15 v, v o = 0 80 100 db i os output short-circuit current 10 38 60 ma i cc total supply current v o = 0, no load 8 16 ma crosstalk attenuation (v o1 /v o2 ) v 01 = 10 v peak, f = 1 khz 110 db (1) all characteristics are measured under open-loop conditions, with zero common-mode input voltage, unless otherwise specified. (2) full temperature ranges are: ? 40 c to 85 c for the sa5532 and sa5532a devices, and 0 c to 70 c for the ne5532 and ne5532a devices. 7.6 operating characteristics v cc = 15 v, t a = 25 c (unless otherwise noted) ne5532, sa5532 ne5532a, sa5532a parameter test conditions unit min typ max min typ max sr slew rate at unity gain 9 9 v/ s v i = 100 mv, r l = 600 ? , overshoot factor 10 10 % a vd = 1, c l = 100 pf f = 30 hz 8 8 10 v n equivalent input noise voltage nv/ hz f = 1 khz 5 5 6 f = 30 hz 2.7 2.7 i n equivalent input noise current pa/ hz f = 1 khz 0.7 0.7 copyright ? 1979 ? 2015, texas instruments incorporated submit documentation feedback 5 product folder links: ne5532 ne5532a sa5532 sa5532a
ne5532 , ne5532a , sa5532 , sa5532a slos075j ? november 1979 ? revised january 2015 www.ti.com 7.7 typical characteristics figure 1. equivalent input noise voltage vs frequency figure 2. equivalent input noise current vs frequency figure 3. output swing bandwidth vs temperature at v cc = 10 v 6 submit documentation feedback copyright ? 1979 ? 2015, texas instruments incorporated product folder links: ne5532 ne5532a sa5532 sa5532a temperature (c) output swing bandwidth (khz) -40 -20 0 20 40 60 80 100 0 20 40 60 80 100 120 140 160 180 d003 frequency (hz) equivalent input noise voltage (nv) 10 100 1000 10000 100000 0 2 4 6 8 10 12 14 16 18 d001 frequency (hz) equivalent input noise current (pa) 10 100 1000 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 d002
ne5532 , ne5532a , sa5532 , sa5532a www.ti.com slos075j ? november 1979 ? revised january 2015 8 detailed description 8.1 overview the ne5532, ne5532a, sa5532, and sa5532a devices are high-performance operational amplifiers combining excellent dc and ac characteristics. they feature very low noise, high output-drive capability, high unity-gain and maximum-output-swing bandwidths, low distortion, high slew rate, input-protection diodes, and output short- circuit protection. these operational amplifiers are compensated internally for unity-gain operation. these devices have specified maximum limits for equivalent input noise voltage. 8.2 functional block diagram 8.3 feature description 8.3.1 unity-gain bandwidth the unity-gain bandwidth is the frequency up to which an amplifier with a unity gain may be operated without greatly distorting the signal. the ne5532, ne5532a, sa5532, and sa5532a devices have a 10-mhz unity-gain bandwidth. 8.3.2 common-mode rejection ratio the common-mode rejection ratio (cmrr) of an amplifier is a measure of how well the device rejects unwanted input signals common to both input leads. it is found by taking the ratio of the change in input offset voltage to the change in the input voltage and converting to decibels. ideally the cmrr would be infinite, but in practice, amplifiers are designed to have it as high as possible. the cmrr of the ne5532, ne5532a, sa5532, and sa5532a devices is 100 db. 8.3.3 slew rate the slew rate is the rate at which an operational amplifier can change its output when there is a change on the input. the ne5532, ne5532a, sa5532, and sa5532a devices have a 9-v/ms slew rate. 8.4 device functional modes the ne5532, ne5532a, sa5532, and sa5532a devices are powered on when the supply is connected. each of these devices can be operated as a single supply operational amplifier or dual supply amplifier depending on the application. copyright ? 1979 ? 2015, texas instruments incorporated submit documentation feedback 7 product folder links: ne5532 ne5532a sa5532 sa5532a outv cc? v cc+ 36 pf 37 pf14 pf 7 pf 15 w 460 w 15 w in+ in? component values shown are nominal.
ne5532 , ne5532a , sa5532 , sa5532a slos075j ? november 1979 ? revised january 2015 www.ti.com 9 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 9.1 typical application some applications require differential signals. figure 4 shows a simple circuit to convert a single-ended input of 2 v to 10 v into differential output of 8 v on a single 15-v supply. the output range is intentionally limited to maximize linearity. the circuit is composed of two amplifiers. one amplifier acts as a buffer and creates a voltage, v out+ . the second amplifier inverts the input and adds a reference voltage to generate v out ? . both v out+ and v out ? range from 2 v to 10 v. the difference, v diff , is the difference between v out+ and v out ? . figure 4. schematic for single-ended input to differential output conversion 9.1.1 design requirements the design requirements are as follows: ? supply voltage: 15 v ? reference voltage: 12v ? input: 2 v to 10 v ? output differential: 8 v 8 submit documentation feedback copyright ? 1979 ? 2015, texas instruments incorporated product folder links: ne5532 ne5532a sa5532 sa5532a r 3 r 1 r 2 r 4 15 v v ref 12 v + + v in + v diff v out- v out+
ne5532 , ne5532a , sa5532 , sa5532a www.ti.com slos075j ? november 1979 ? revised january 2015 typical application (continued) 9.1.2 detailed design procedure the circuit in figure 4 takes a single-ended input signal, v in , and generates two output signals, v out+ and v out ? using two amplifiers and a reference voltage, v ref . v out+ is the output of the first amplifier and is a buffered version of the input signal, v in equation 1 . v out ? is the output of the second amplifier which uses v ref to add an offset voltage to v in and feedback to add inverting gain. the transfer function for v out ? is equation 2 . v out+ = v in (1) (2) the differential output signal, v diff , is the difference between the two single-ended output signals, v out+ and v out ? . equation 3 shows the transfer function for v diff . by applying the conditions that r 1 = r 2 and r 3 = r 4 , the transfer function is simplified into equation 6 . using this configuration, the maximum input signal is equal to the reference voltage and the maximum output of each amplifier is equal to the v ref . the differential output range is 2 v ref . furthermore, the common mode voltage will be one half of v ref (see equation 7 ). (3) v out+ = v in (4) v out ? = v ref ? v in (5) v diff = 2 v in ? v ref (6) (7) 9.1.2.1 amplifier selection linearity over the input range is key for good dc accuracy. the common mode input range and the output swing limitations determine the linearity. in general, an amplifier with rail-to-rail input and output swing is required. bandwidth is a key concern for this design. since the ne5532 has a bandwidth of 10 mhz, this circuit will only be able to process signals with frequencies of less than 10 mhz. 9.1.2.2 passive component selection because the transfer function of v out ? is heavily reliant on resistors (r 1 , r 2 , r 3 , and r 4 ), use resistors with low tolerances to maximize performance and minimize error. this design used resistors with resistance values of 36 k with tolerances measured to be within 2%. but, if the noise of the system is a key parameter, the user can select smaller resistance values (6 k or lower) to keep the overall system noise low. this ensures that the noise from the resistors is lower than the amplifier noise. 9.1.3 application curves the measured transfer functions in figure 5 , figure 6 , and figure 7 were generated by sweeping the input voltage from 0 v to 12v. however, this design should only be used between 2 v and 10 v for optimum linearity. copyright ? 1979 ? 2015, texas instruments incorporated submit documentation feedback 9 product folder links: ne5532 ne5532a sa5532 sa5532a out out cm ref v v 1 v v 2 2 + - + ? ? = = ? ? 2 4 2 d if f o u t o u t in r e f 1 3 4 1 r r r v v v v 1 v 1 r r r r + - ? ? ? ? ? ? = - = + - + ? ? ? + ? ? ? 4 2 2 out ref in 3 4 1 1 r r r v v 1 v r r r r - ? ? ? ? = + - ? ? + ? ?
ne5532 , ne5532a , sa5532 , sa5532a slos075j ? november 1979 ? revised january 2015 www.ti.com typical application (continued) figure 5. differential output voltage vs input voltage figure 6. positive output voltage node vs input voltage figure 7. positive output voltage node vs input voltage 10 submit documentation feedback copyright ? 1979 ? 2015, texas instruments incorporated product folder links: ne5532 ne5532a sa5532 sa5532a 0 2 4 6 8 10 12 0 1 2 3 4 5 6 7 8 9 10 11 12 vout t (v) vin (v) c002 12 8 4 0 4 8 12 0 1 2 3 4 5 6 7 8 9 10 11 12 vdiff (v) vin (v) c003 0 2 4 6 8 10 12 0 1 2 3 4 5 6 7 8 9 10 11 12 vout+ (v) vin (v) c001
ne5532 , ne5532a , sa5532 , sa5532a www.ti.com slos075j ? november 1979 ? revised january 2015 10 power supply recommendations the ne5532x and sa5532x devices are specified for operation over the range of 5 to 15 v; many specifications apply from 0 c to 70 c (ne5532x) and -40 c to 85 c (sa5532x). the typical characteristics section presents parameters that can exhibit significant variance with regard to operating voltage or temperature. caution supply voltages outside of the 22 v range can permanently damage the device (see the absolute maximum ratings ). place 0.1- f bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high impedance power supplies. for more detailed information on bypass capacitor placement, refer to the layout guidelines . 11 layout 11.1 layout guidelines for best operational performance of the device, use good pcb layout practices, including: ? noise can propagate into analog circuitry through the power pins of the circuit as a whole and the operational amplifier. bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry. ? connect low-esr, 0.1- f ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. a single bypass capacitor from v+ to ground is applicable for single supply applications. ? separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. one or more layers on multilayer pcbs are usually devoted to ground planes. a ground plane helps distribute heat and reduces emi noise pickup. make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. for more detailed information, refer to circuit board layout techniques, sloa089 . ? to reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. if it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace. ? place the external components as close to the device as possible. keeping rf and rg close to the inverting input minimizes parasitic capacitance, as shown in layout example . ? keep the length of input traces as short as possible. always remember that the input traces are the most sensitive part of the circuit. ? consider a driven, low-impedance guard ring around the critical traces. a guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 11.2 layout example figure 8. operational amplifier schematic for noninverting configuration copyright ? 1979 ? 2015, texas instruments incorporated submit documentation feedback 11 product folder links: ne5532 ne5532a sa5532 sa5532a + rin rg rf vout vin
ne5532 , ne5532a , sa5532 , sa5532a slos075j ? november 1979 ? revised january 2015 www.ti.com layout example (continued) figure 9. operational amplifier board layout for noninverting configuration 12 submit documentation feedback copyright ? 1979 ? 2015, texas instruments incorporated product folder links: ne5532 ne5532a sa5532 sa5532a out1 out2 in1 in1+ vcc vcc+ in2 in2+ rg rin rf gnd vin vs- gnd vs+ gnd run the input traces as far away from the supply lines as possible only needed for dual-supply operation place components close to device and to each other to reduce parasitic errors use low-esr, ceramic bypass capacitor (or gnd for single supply) ground (gnd) plane on another layer
ne5532 , ne5532a , sa5532 , sa5532a www.ti.com slos075j ? november 1979 ? revised january 2015 12 device and documentation support 12.1 related links the table below lists quick access links. categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. table 1. related links technical support & parts product folder sample & buy tools & software documents community ne5532 click here click here click here click here click here ne5532a click here click here click here click here click here sa5532 click here click here click here click here click here sa5532a click here click here click here click here click here 12.2 trademarks all trademarks are the property of their respective owners. 12.3 electrostatic discharge caution this integrated circuit can be damaged by esd. texas instruments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.4 glossary slyz022 ? ti glossary. this glossary lists and explains terms, acronyms and definitions. 13 mechanical, packaging, and orderable information the following pages include mechanical packaging and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser based versions of this data sheet, refer to the left hand navigation. copyright ? 1979 ? 2015, texas instruments incorporated submit documentation feedback 13 product folder links: ne5532 ne5532a sa5532 sa5532a
package option addendum www.ti.com 17-dec-2015 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples ne5532ad active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532a ne5532ade4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532a ne5532adr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532a ne5532adre4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532a ne5532adrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532a ne5532aip obsolete pdip p 8 tbd call ti call ti -40 to 85 ne5532ap active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type 0 to 70 ne5532ap ne5532ape4 active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type 0 to 70 ne5532ap ne5532apsr active so ps 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532a ne5532apsre4 active so ps 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532a ne5532d active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532 ne5532dg4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532 ne5532dr active soic d 8 2500 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim 0 to 70 n5532 ne5532dre4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532 ne5532drg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532 ne5532ip obsolete pdip p 8 tbd call ti call ti -40 to 85 ne5532p active pdip p 8 50 pb-free (rohs) cu nipdau | cu sn n / a for pkg type 0 to 70 ne5532p ne5532pe4 active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type 0 to 70 ne5532p
package option addendum www.ti.com 17-dec-2015 addendum-page 2 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples ne5532psr active so ps 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532 ne5532psre4 active so ps 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532 ne5532psrg4 active so ps 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 n5532 sa5532ad active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 sa5532a SA5532ADG4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 sa5532a sa5532adr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 sa5532a sa5532adrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 sa5532a sa5532ap active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type -40 to 85 sa5532ap sa5532ape4 active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type -40 to 85 sa5532ap sa5532d active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 sa5532 sa5532dr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 sa5532 sa5532drg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 sa5532 sa5532p active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type -40 to 85 sa5532p sa5532pe4 active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type -40 to 85 sa5532p (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device.
package option addendum www.ti.com 17-dec-2015 addendum-page 3 (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant ne5532adr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 ne5532apsr so ps 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 q1 ne5532dr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 ne5532dr soic d 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 q1 ne5532drg4 soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 ne5532psr so ps 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 q1 sa5532adr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 sa5532dr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 package materials information www.ti.com 21-jan-2014 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) ne5532adr soic d 8 2500 340.5 338.1 20.6 ne5532apsr so ps 8 2000 367.0 367.0 38.0 ne5532dr soic d 8 2500 340.5 338.1 20.6 ne5532dr soic d 8 2500 364.0 364.0 27.0 ne5532drg4 soic d 8 2500 340.5 338.1 20.6 ne5532psr so ps 8 2000 367.0 367.0 38.0 sa5532adr soic d 8 2500 340.5 338.1 20.6 sa5532dr soic d 8 2500 340.5 338.1 20.6 package materials information www.ti.com 21-jan-2014 pack materials-page 2

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